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Designing with PCTF® Technology  

 

Printed Resistors

 

PCTF and Printed Resistors: Wide range 50 mohm to 10 Mohm, ratio matched, power = 100 W, small geometry (.010” x .010”).

  • Standard air fireable thick film resistors, from 50 mohms up to 1Mohms per square.
  • Minimum resistor size .010”x .010” with .003” minimum overlap.
  • Power rating: consult factory for rating and required geometry.
  • Tolerances: +/- 1% typical.
  • Matching: +/- 0.5% typical.
  • TCR: 50- 200 ppm/°C typical.                  

Plated Copper Lines Resistance

Line Thickness

Resistivity

.001"

0.65 mohms/sq

.002"

0.35 mohms/sq

.003"

0.26 mohms/sq

.005"

0.14 mohms/sq

.007"

0.10 mohms/sq

.010"

0.06 mohms/sq

 

Printed Thru Holes (PTH) & Copper Plated Thru Holes (CPTH) Resistance

Ceramic thickness

Through Hole Diameter

PTH Resistance

mohms

CPTH Resistance

mohms

0.015"

.008"

2.5

0.40

.0.025"

.010"

4.0

0.52

0.040"

0.012"

8.0

0.70

 

 

 

Cross-sectional View of Plugged Silver & Gold Vias
  • Array of 4 vias
  • Total Resistance: .1moOhms (10-4ohms)
  • @10 amp I2R losses ~10mW

 

POWERPLUGS: Copper Plated Plugged Via Holes in Ceramic

High Electrical Conductance  

Ceramic
thickness

Plugged Via
Size

Resistance-mohms
(PCTF)

Resistance (mohms)
gold filled

0.010"

.005"

0.50

1.5

0.015"

.008"

0.42

1.3

0.020"

.010"

0.38

1.14

0.025"

.010"

0.47

1.4

High Thermal Conductance

Via Plug Material

Thermal Conductivity,

Plated Copper (PCTF)

200 W/°CxM

Au

65 W/°CxM

 

PowerPlugs create an effective heat transfer path with a low thermal resistance

 

 Example: A single die of 3mm x 3mm (.120”x.120”) dissipating 5 W has 20 plugged vias underneath the chip.

Typical .008”-.012” plugged via in .015" - .020” thick alumina ceramic will create a thermal path with a thermal resistance of ~ 35-40oC/W per via.

An approximate thermal resistance will be about 2oC/W and the temperature rise should not exceed more than: ∆T=10oC max

Via Hermeticity

 

Remtec’s plugged via holes are normally used for input/output connections in metalized ceramic substrates, leadless chip carriers and hermetic packages without metal enclosure (Integral Substrate Package)

  • Usually vias are hermetic and meet gross leak test requirements common for commercial and industrial applications.
  • For more demanding applications, plugged via holes can be fabricated to meet full MIL STD hermeticity requirements for a fine leak test to 10-8 std cc/sec.